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Memory Wall Breakthrough: Sandisk HBF Brings NAND-Based High-Bandwidth Storage Next-to-GPU

August 25 2026
Ersa

Explore how Sandisk High-Bandwidth Flash could bring NAND-based high-bandwidth storage next to GPUs alongside HBM, improving AI inference, RAG, KV cache, memory hierarchy, and data-center efficiency.

AI Infrastructure · Memory Wall · HBM · NAND-Based High-Bandwidth Storage

Memory Wall Breakthrough: Sandisk HBF Brings NAND-Based High-Bandwidth Storage Next-to-GPU Alongside HBM

A comprehensive B2B blog analysis of how Sandisk High-Bandwidth Flash could create a new GPU-adjacent memory tier, complement HBM, and help modern AI systems overcome capacity, bandwidth, and inference cost bottlenecks.

Editorial note: This article is written for global B2B readers, AI data-center operators, semiconductor supply-chain professionals, GPU server buyers, storage solution providers, system integrators, enterprise infrastructure teams, and technology investors. Sandisk High-Bandwidth Flash, or HBF, is discussed here as an emerging NAND-based high-bandwidth storage and memory-tier concept for AI systems.

HBF should not be interpreted as a direct replacement for HBM DRAM in the latency-critical GPU memory path. Instead, it is best understood as a new high-capacity, persistent, GPU-adjacent tier that may work alongside HBM to reduce pressure on scarce accelerator memory and improve AI inference economics.

1. Introduction: The Memory Wall Becomes the AI Wall

The artificial intelligence industry is entering a phase where the most difficult problem is no longer only raw compute. GPUs, AI accelerators, advanced packaging, and high-speed interconnects have improved dramatically. Yet many AI systems still face a fundamental bottleneck: moving enough data to the processor at the right time, at the right cost, and at the right energy level. This is the classic “memory wall,” but in the era of large language models and generative AI, it has become the AI wall.

High Bandwidth Memory, or HBM, has been the industry’s most successful answer to this challenge so far. HBM places stacked DRAM close to the GPU or AI accelerator package, providing the bandwidth needed for tensor operations, transformer models, training clusters, and high-performance inference. Without HBM, the current wave of AI infrastructure would be far less capable.

However, HBM is not unlimited. It is expensive, difficult to manufacture, tied to advanced packaging capacity, and constrained in capacity per accelerator. At the same time, AI workloads are demanding larger models, longer context windows, bigger key-value caches, larger retrieval indexes, more model variants, more adapters, and persistent memory for AI agents. This means that even excellent HBM stacks may not be enough to handle the full data footprint of next-generation AI systems economically.

Sandisk High-Bandwidth Flash, or HBF, introduces an important architectural idea: bring NAND-based high-bandwidth storage closer to the GPU, alongside HBM, rather than leaving all large persistent data in distant SSD arrays or network storage. If implemented effectively, HBF could become a new GPU-adjacent tier that supports fast model staging, retrieval-augmented generation, vector search, semantic caching, long-context inference, and multi-model AI serving.

This is not a simple story of flash replacing DRAM. NAND flash and HBM DRAM have different latency, endurance, persistence, cost, and bandwidth characteristics. HBM remains the correct technology for the hottest GPU working set. HBF is better understood as a complementary layer that can hold large, warm, persistent AI data close enough to the GPU to reduce bottlenecks and improve total system efficiency.

For B2B buyers, this shift matters because AI infrastructure purchasing is becoming more complex. A server is no longer judged only by how many GPUs it contains. Buyers must evaluate effective memory capacity, cost per token, retrieval latency, model switching speed, storage bandwidth, HBM availability, energy efficiency, software maturity, and future scalability. A NAND-based high-bandwidth storage tier next to GPU could become a major differentiator in AI server design.

2. What Is the Memory Wall?

The memory wall describes the growing gap between processor speed and memory access speed. Modern processors can perform enormous numbers of operations per second, but their real performance depends on how quickly they can receive data. When memory systems cannot deliver data fast enough, compute units stall. The processor may look powerful on paper but operate below its potential in real workloads.

In AI, this problem becomes severe because models are data-hungry. Large language models must repeatedly access weights, activations, attention data, cache structures, embeddings, and external knowledge. The amount of data moved during training and inference can be enormous. Every generated token may require the model to access large parameter sets and context data.

The memory wall is not only about bandwidth. It is also about latency, capacity, locality, persistence, software scheduling, and cost. A system may have fast memory but not enough capacity. It may have large storage but insufficient throughput. It may have good peak bandwidth but poor sustained performance under random access patterns. It may have enough hardware capability but poor software placement of data across tiers.

Historically, the industry solved memory problems by adding caches, widening memory buses, increasing DRAM speed, using GDDR, and introducing HBM. In AI, these solutions remain important, but they must now be combined with larger storage-aware memory hierarchies. The model is no longer a small working set. It is a massive ecosystem of model weights, context, embeddings, vector stores, adapters, user history, and data pipelines.

Sandisk HBF is interesting because it targets a part of the memory wall that HBM alone cannot fully solve: high-capacity, persistent, high-throughput data access near the GPU. By moving NAND-based high-bandwidth storage closer to accelerator workflows, HBF could reduce the distance between AI compute and the large data structures that support modern inference.

3. Why GPUs Depend on HBM

GPUs and AI accelerators rely on massive parallelism. Their compute engines are designed to process large numbers of mathematical operations simultaneously. But parallel compute requires parallel data delivery. If data arrives too slowly, many compute lanes remain idle. This is why memory bandwidth is central to GPU performance.

HBM is built specifically to address this problem. It stacks DRAM dies vertically and connects them through Through-Silicon Vias. These memory stacks are placed close to the GPU or accelerator die through advanced packaging. The result is a very wide memory interface and extremely high bandwidth within a compact physical footprint.

For large language models, HBM is used to store and access active model weights, tensors, intermediate data, and performance-critical key-value cache. In training, HBM supports forward passes, backward passes, gradients, optimizer states, and communication buffers. In inference, HBM supports low-latency token generation and high-throughput serving.

The reason HBM is so valuable is not only speed. It is locality. Placing memory close to the GPU reduces data movement distance, which improves bandwidth and energy efficiency. Moving data across long board traces, PCIe links, network paths, or storage layers consumes time and power. HBM keeps the hottest data near compute.

This is why HBM is unlikely to disappear from high-end AI systems. It solves the hottest part of the memory wall. But it does not solve every part of the AI data problem. As AI systems grow beyond what can economically fit in HBM, the industry needs additional tiers.

4. The Limits of HBM-Only Scaling

HBM is powerful, but it has several structural limits. The first is capacity. Even though HBM capacity increases with each generation, it remains limited compared with NAND flash and SSD storage. Adding more HBM stacks increases package complexity, cost, power, and thermal design challenges.

The second limit is cost. HBM is a premium memory technology. It requires advanced DRAM manufacturing, die stacking, TSV processing, bonding, testing, and integration into advanced accelerator packages. For data that truly needs HBM-level performance, this cost is justified. But using HBM for all warm and persistent AI data is economically inefficient.

The third limit is supply. HBM production is concentrated among a small number of suppliers and depends on advanced packaging ecosystems. AI demand has created shortages and long lead times. Relying exclusively on more HBM can expose data-center buyers to supply-chain risk.

The fourth limit is workload mismatch. Not every AI data structure needs to be in HBM. Model variants, LoRA adapters, vector indexes, document embeddings, semantic caches, old context blocks, and persistent AI agent memory may need fast access, but not necessarily cycle-by-cycle accelerator access. Placing all of them in HBM wastes scarce capacity.

Therefore, the future is not simply “more HBM everywhere.” The future is “better data placement.” HBM should hold the hottest active data. A GPU-adjacent HBF tier can hold larger warm data. SSDs and object storage can hold colder data. This creates a more balanced and scalable system.

5. What Is Sandisk HBF?

Sandisk High-Bandwidth Flash, or HBF, can be described as a NAND-based high-bandwidth storage or memory-tier concept designed for AI workloads. Traditional NAND flash is widely used in SSDs for persistent storage. HBF takes the idea further by targeting higher bandwidth, closer integration with compute, and better suitability for AI inference data flows.

HBF is important because NAND flash has two major advantages over HBM: capacity and persistence. NAND can store far more data at lower cost per bit, and it retains data without power. These qualities are valuable for model storage, inference assets, vector databases, semantic caches, enterprise knowledge bases, and long-term AI context.

The challenge is that conventional storage is often too far from the GPU. Standard SSDs can provide large capacity, but the access path may involve storage protocols, host CPU intervention, PCIe bottlenecks, software overhead, and unpredictable latency. For AI inference, especially at scale, these overheads can reduce performance and increase cost.

HBF aims to make flash more useful as a GPU-adjacent performance tier. It may achieve this through high parallelism, optimized controllers, improved interfaces, software-aware data placement, prefetching, and closer physical or logical proximity to GPUs. The exact implementation may vary by product generation, but the architectural goal is clear: move large persistent AI data closer to compute.

In this role, HBF can support workloads that are too large for HBM but too performance-sensitive for distant storage. It becomes a bridge between expensive near-GPU DRAM and large but slower storage.

6. What “Next-to-GPU” Means in Practice

The phrase “next-to-GPU” does not necessarily mean that HBF sits inside the same package as HBM. It means that HBF is architecturally closer to the GPU workflow than conventional storage. This closeness can be physical, logical, protocol-level, or software-level.

Physical proximity could involve placing HBF modules near GPU boards in the server, minimizing data path length and improving bandwidth. Logical proximity could involve direct data movement paths between HBF and GPU memory, reducing unnecessary CPU mediation. Protocol proximity could involve interfaces optimized for accelerator data movement rather than generic storage. Software proximity could involve AI runtimes that treat HBF as a memory tier rather than just a file system.

In practical AI server design, “next-to-GPU” may mean that HBF acts as a fast local persistent pool for GPUs. The GPU uses HBM for active execution, while HBF stores model components, embeddings, indexes, and caches that can be moved into HBM or accessed by the serving pipeline quickly. The purpose is to reduce the penalty of fetching data from slower tiers.

This concept is especially relevant for inference servers. A GPU cluster may need to serve many model variants and customer-specific workloads. If those assets are stored only in remote storage, load times and network traffic increase. If they are stored in HBF near the GPU, model switching and retrieval can become faster.

The effectiveness of next-to-GPU HBF depends on the data path. If HBF still behaves like ordinary storage with high overhead, benefits may be limited. If it offers high sustained throughput, efficient data movement, and software integration, it could become an important memory-wall breakthrough.

7. HBF Alongside HBM: Complementary Roles

HBM and HBF serve different parts of the AI memory hierarchy. HBM is volatile, extremely fast, and close to GPU compute. HBF is non-volatile, higher capacity, and optimized for high-throughput persistent data. The best architecture uses HBM for the hot path and HBF for the warm path.

The hot path includes active tensors, current model weights, attention operations, and latency-critical KV cache. These belong in HBM because they directly affect GPU utilization and token latency. The warm path includes model variants, adapters, retrieval indexes, older context blocks, embedding stores, and semantic caches. These may benefit from HBF because they need capacity and persistence with better access speed than conventional storage.

Category HBM Sandisk HBF Design Meaning
Technology Stacked DRAM NAND-based high-bandwidth storage Different tiers, not direct substitutes
Best Role Active GPU memory Warm persistent AI data HBM executes, HBF stages and extends
Latency Low relative to storage Higher than DRAM HBF requires prefetching and smart placement
Capacity Limited and expensive Much larger potential capacity HBF addresses AI data growth
Persistence No Yes HBF improves restart and model availability

8. A New AI Memory Hierarchy

The most practical way to understand HBF is through a tiered memory hierarchy. Modern AI systems should not force all data into one layer. Instead, they should place data based on temperature, latency sensitivity, access frequency, persistence requirement, and cost.

At the top is on-chip cache and SRAM. This is the smallest but fastest tier. Next is HBM, which handles the active GPU working set. Then comes host DRAM, which supports CPU-side orchestration, batching, preprocessing, and system buffers. HBF can sit below or alongside host memory as a high-capacity persistent tier close to the GPU. Below HBF are NVMe SSDs, storage arrays, and object storage.

Example GPU-Centric AI Memory Hierarchy

  1. On-chip cache: Immediate compute buffers and ultra-hot data.
  2. HBM: Active model execution, hot tensors, attention, active KV cache.
  3. DDR DRAM: Host orchestration, batching, scheduling, CPU-side preprocessing.
  4. Sandisk HBF: Warm model weights, adapters, vector indexes, semantic cache, long-context overflow.
  5. NVMe SSD: Larger local model repositories, checkpoints, logs, datasets.
  6. Object storage: Long-term data lake, archives, training corpora, historical documents.

This hierarchy makes HBM more valuable by preventing it from being used inefficiently. The goal is not to reduce HBM importance but to reserve HBM for what it does best. HBF expands the usable memory environment around the GPU.

9. Why LLM Inference Is the Key Opportunity

LLM inference is the strongest use case for HBF because it is both memory-intensive and cost-sensitive. Training large models is expensive, but it is usually concentrated in specific projects. Inference runs continuously and directly affects operating cost. Every prompt, every generated token, and every user session consumes compute and memory resources.

Inference platforms often need to host many models at once. These may include general-purpose models, domain-specific fine-tuned versions, LoRA adapters, quantized models, customer-specific versions, multilingual variants, coding models, vision-language models, and smaller task models. Keeping every possible asset in HBM is unrealistic.

HBF can act as a warm model pool. Popular assets stay in HBM. Less active but still important assets stay in HBF. When a request requires a specific model or adapter, the system can load it from HBF much faster than from deep storage. This improves responsiveness and allows more model diversity per server.

Inference also requires high concurrency. Many users may be served by the same GPU cluster. HBM capacity can limit how many sessions can run simultaneously, especially when context windows are long. HBF may support tiered context and cache strategies that increase effective capacity.

For cloud providers, this can reduce cost per token. For enterprises, it can make private AI deployment more practical. For GPU server vendors, it creates a new design category: inference-optimized systems with balanced HBM and HBF capacity.

10. RAG, Vector Search, and External Knowledge

Retrieval-Augmented Generation, or RAG, is one of the most important AI architectures for enterprise use. It allows an AI model to retrieve relevant external information before generating a response. This means companies can use AI with their own documents, product catalogs, legal files, medical references, engineering manuals, support tickets, and internal knowledge bases.

RAG creates a major memory and storage challenge. The system must store embeddings, vector indexes, metadata, document chunks, and semantic caches. These structures can become extremely large. DRAM may be too expensive for all of them. HBM is even more expensive and should be reserved for active model execution. Ordinary SSDs may be too slow for low-latency retrieval at scale.

HBF can potentially become a strong tier for RAG workloads. By placing vector indexes and semantic caches in NAND-based high-bandwidth storage next to GPU, the system can retrieve data more efficiently. This improves response speed and reduces pressure on both HBM and remote storage.

For B2B customers, this is highly relevant. Many enterprises are not training frontier models. They are deploying AI assistants that answer questions based on business data. The value of those systems depends on retrieval speed, accuracy, and cost. HBF could improve the infrastructure economics behind enterprise AI knowledge systems.

11. KV Cache, Long Context, and Persistent Memory

Key-value cache is a major memory consumer in LLM inference. During text generation, transformer models store key and value tensors from previous tokens. This allows efficient attention processing across the context. As context windows expand from thousands to hundreds of thousands or even millions of tokens, KV cache requirements can become enormous.

HBM is the best place for active KV cache. However, not every part of a long conversation or document context is equally active at every moment. Older context blocks may be less frequently accessed. Some workloads may tolerate tiered cache strategies where active data stays in HBM and less active data moves to DRAM or HBF.

HBF may also be useful for persistent session memory. AI agents, enterprise copilots, and personal assistants may need to remember prior interactions, user preferences, workflow state, and task history. Keeping all of this in volatile memory is inefficient. Storing it in remote storage may be too slow. HBF provides a possible local persistent layer.

This is technically difficult. If data is moved out of HBM and then needed immediately, latency can increase. Therefore, KV cache tiering requires smart software. The system must predict which context data will be needed, prefetch it, and avoid stalling GPU execution.

When done correctly, HBF can help extend effective context capacity without forcing all data into HBM. This could be important for legal AI, code analysis, medical records, scientific research, long-document summarization, and agentic workflows.

12. Bandwidth vs Latency: Correct Technical Interpretation

It is important to distinguish bandwidth from latency. Bandwidth measures how much data can be moved per unit of time. Latency measures how long it takes to access a specific piece of data. HBM is excellent in both bandwidth and low-latency access relative to storage tiers. HBF may offer high bandwidth, but flash latency remains fundamentally different from DRAM latency.

This means HBF should not be used as if it were simply a bigger HBM. NAND flash involves page reads, controller logic, error correction, wear management, and other mechanisms. Even if aggregate throughput is high, random access latency is not the same as HBM.

HBF works best when workloads can use streaming, batching, prefetching, and caching. Model staging is a good example. If a system knows that a model adapter will be needed soon, it can load it from HBF into HBM before execution. Vector search is another example, especially if data structures are organized for high-throughput access.

HBF is less suitable for unpredictable, latency-critical, fine-grained memory access inside the GPU execution loop. That remains HBM’s domain. The correct technical interpretation is that HBF may deliver comparable system-level throughput for selected data flows, not identical behavior to HBM in every operation.

For infrastructure buyers, this distinction matters. Marketing language around bandwidth must be evaluated against real workloads. Buyers should test model loading, retrieval latency, cache hit rates, token latency, throughput under concurrency, and total cost per query.

13. Cost, Capacity, and Total Cost of Ownership

The strongest business case for HBF is total cost of ownership. HBM is expensive and supply-constrained. AI inference requires large capacity and continuous operation. If HBF allows systems to use HBM more efficiently, it can reduce cost per token and improve infrastructure utilization.

HBF can increase effective memory capacity without requiring every byte to be premium DRAM. This matters when serving many models, supporting large retrieval indexes, or handling long-context sessions. A system with balanced HBM and HBF may serve more workloads per GPU than a system relying only on HBM and ordinary SSDs.

Cost savings may come from several areas: reduced need for maximum-HBM configurations, faster model loading, lower remote storage traffic, better GPU utilization, improved restart times, and higher concurrency. However, HBF also introduces costs, including modules, controllers, software integration, monitoring, and endurance management.

The correct business question is not whether HBF is cheaper than HBM per bit. It almost certainly should be. The deeper question is whether HBF reduces total system cost while maintaining required latency and throughput. That depends on workload fit.

Where HBM Cost Is Justified

  • Active tensor computation
  • Latency-critical token generation
  • Training inner loops
  • Hot KV cache
  • High-performance accelerator utilization

Where HBF May Reduce TCO

  • Warm model pools
  • LoRA and adapter storage
  • Vector indexes and RAG data
  • Semantic caches
  • Long-context overflow and persistent memory

14. Software Stack Requirements

A next-to-GPU HBF tier will only succeed if the software stack can use it intelligently. Hardware alone cannot solve the memory wall. AI runtimes, schedulers, operating systems, storage drivers, vector databases, model-serving frameworks, and monitoring tools must understand the tiered architecture.

Software must decide which data belongs in HBM, DRAM, HBF, SSD, or object storage. This decision depends on access frequency, latency sensitivity, request patterns, model popularity, tenant priority, and cost. Poor placement can destroy performance. Good placement can hide latency and improve throughput.

Prefetching is especially important. If the system can predict that a model variant or retrieval index will be needed, it can move data from HBF into faster memory before execution. Request batching and routing can also improve HBF efficiency by grouping similar workloads.

Vector databases may need HBF-aware index placement. AI serving engines may need HBF-aware model loading. KV cache managers may need tiered cache migration. Observability tools must measure latency, throughput, cache hit rate, endurance wear, temperature, queue depth, and error rates.

Standard APIs and integration frameworks will accelerate adoption. If HBF requires custom engineering for every deployment, only very large cloud providers will use it at first. If it integrates with mainstream AI software, broader enterprise adoption becomes possible.

15. Data-Center and GPU Server Design Impact

HBF could change how AI servers are designed. Today, many buyers focus heavily on GPU count, GPU type, HBM capacity, and networking. In the future, inference-optimized servers may also be evaluated by HBF capacity, HBF bandwidth, data path efficiency, model-loading speed, retrieval performance, and tiered memory software.

Server OEMs and ODMs could create specialized platforms for AI inference. These systems may include GPUs with HBM, large host DRAM, GPU-adjacent HBF, NVMe SSDs, and high-speed networking. The goal would be to serve models and retrieval workloads efficiently, rather than simply maximize raw training performance.

Cloud providers could use HBF to improve multi-tenant AI. Customer-specific models and indexes could remain on local HBF near the GPU. This reduces repeated loading from remote storage and improves service responsiveness. It also helps isolate workloads and manage tenant-specific assets.

Enterprise AI appliances could also benefit. A company running private AI may not need frontier training clusters, but it may need fast access to internal documents and models. HBF-enabled systems could offer strong local inference and retrieval performance without requiring excessive HBM capacity.

The result may be a more diverse AI server market. Training servers will remain HBM-heavy and interconnect-heavy. Inference servers may become memory-hierarchy optimized, with HBF playing a larger role.

16. Supply-Chain Implications

HBF has important supply-chain implications because HBM is one of the most constrained components in AI hardware. HBM production requires advanced DRAM, stacking, TSVs, testing, and packaging. Demand from AI accelerators has created intense competition for supply.

A high-bandwidth NAND-based tier can reduce unnecessary HBM consumption. This does not eliminate HBM demand. Instead, it makes HBM use more efficient by moving warm and persistent data into a different tier. For buyers, this may reduce dependency on maximum-HBM configurations and improve procurement flexibility.

For NAND suppliers, HBF creates a path into higher-value AI infrastructure. NAND flash has historically experienced strong price cycles. AI-oriented HBF could create more differentiated demand, especially if it becomes part of standardized GPU server architectures.

For system integrators, HBF creates new solution categories. Integrators can sell GPU servers optimized for RAG, model hosting, AI agents, long-context inference, and enterprise knowledge systems. These systems may require different qualification and benchmarking than traditional GPU servers.

For distributors and B2B resellers, HBF may eventually become a feature to explain carefully to customers: not “more storage” in the ordinary sense, but a performance-oriented AI memory tier that works alongside HBM.

17. Risks, Limits, and Engineering Challenges

HBF is promising, but several risks must be considered. The first is latency. NAND flash cannot replace DRAM for the hottest GPU data path. If software treats HBF like HBM, performance may suffer. HBF must be used where its capacity and bandwidth advantages fit the workload.

The second challenge is endurance. Flash has finite write endurance. AI workloads involving frequent cache updates, temporary writes, or high churn must be managed carefully. Read-heavy workloads such as model staging and retrieval may be more suitable than write-heavy workloads.

The third challenge is software complexity. Tiered memory requires intelligent placement, prefetching, cache management, and observability. Without mature software, HBF may not deliver expected benefits.

The fourth challenge is interface standardization. HBF could be exposed as storage, memory expansion, accelerator-attached storage, or a proprietary tier. Each approach has different trade-offs. Broad adoption requires predictable integration.

The fifth challenge is workload specificity. Not every AI workload needs HBF. Small models, simple inference tasks, or workloads with compact working sets may not benefit. HBF is most valuable when data exceeds economical HBM capacity but still needs faster access than conventional storage.

18. Future Outlook

The future of AI memory will be hierarchical. HBM will continue improving through HBM3E, HBM4, and future generations. GPUs and AI accelerators will still rely on HBM for active computation. But AI systems will also need larger and more flexible memory environments.

HBF may become one of the key tiers in that future. As inference grows, the need for persistent, high-capacity, high-bandwidth data near GPUs will increase. RAG, AI agents, long-context models, multimodal systems, enterprise copilots, and personalized AI services all push in this direction.

HBF may also coexist with other technologies such as CXL memory expansion, pooled DRAM, advanced NVMe SSDs, computational storage, near-memory processing, compression, quantization, and sparse model architectures. The winning systems will combine multiple techniques.

For buyers, the key will be workload-based evaluation. Benchmarks should include model loading, retrieval latency, token latency, concurrency, cost per token, cache efficiency, power use, and operational reliability. The best AI infrastructure will not simply have the most memory. It will have the right memory in the right place.

19. Conclusion: HBF Could Break the Memory Wall by Expanding the GPU Memory Neighborhood

Sandisk HBF represents an important idea for the AI infrastructure market: bring NAND-based high-bandwidth storage closer to the GPU, alongside HBM, so that AI systems can access large persistent data more efficiently. This approach does not replace HBM. Instead, it makes HBM more effective by reserving it for the hottest and most latency-sensitive data.

The memory wall in AI is not only a bandwidth problem. It is also a capacity, cost, persistence, and data-placement problem. HBM solves the hot compute layer, but AI inference increasingly requires a larger surrounding memory environment. HBF can potentially provide that environment by storing warm model assets, retrieval indexes, semantic caches, long-context data, and persistent AI memory near the GPU.

For data-center operators, HBF could improve cost per token, model-serving flexibility, restart time, retrieval performance, and infrastructure utilization. For server OEMs and ODMs, it creates a new platform category. For NAND suppliers, it elevates flash into AI infrastructure. For HBM suppliers, it strengthens the overall memory hierarchy by helping customers use HBM more efficiently.

The next generation of AI systems will not be defined by compute alone. It will be defined by intelligent data movement. In that future, HBM remains the high-speed engine room, while HBF may become the high-capacity GPU-adjacent warehouse that helps AI systems scale beyond the memory wall.

FAQ: Sandisk HBF, HBM, and GPU-Adjacent AI Memory

1. Does Sandisk HBF replace HBM in AI GPUs?

No. HBF is not a direct replacement for HBM. HBM remains essential for active GPU computation, hot tensors, model execution, and latency-critical memory access. HBF is better understood as a high-capacity NAND-based tier for warm and persistent AI data near the GPU.

2. What does “next-to-GPU” HBF mean?

“Next-to-GPU” means HBF is placed closer to GPU workflows than conventional storage, either physically, logically, or through optimized interfaces and software. The goal is to reduce data movement delays for model staging, retrieval, caching, and inference support tasks.

3. Which AI workloads benefit most from HBF?

HBF is most useful for large-scale inference, multi-model serving, retrieval-augmented generation, vector search, semantic caching, long-context AI, KV cache tiering, AI agents, and enterprise knowledge systems.

4. Why is HBF useful if flash has higher latency than DRAM?

HBF is useful because not all AI data requires DRAM-level latency. Many model assets, embeddings, indexes, and cache segments need high capacity and strong throughput rather than immediate cycle-level access. With prefetching and smart software, HBF can support these warm data paths effectively.

5. What are the biggest barriers to HBF adoption?

The main barriers include latency management, flash endurance, software maturity, interface standardization, workload qualification, and integration with AI serving frameworks. HBF requires intelligent tiered-memory software to deliver its full value.

Ersa

Leda Lunardi has more than 10 years of extensive experience in electronic components and semiconductors, specializing in power devices, wide-bandgap semiconductors, advanced packaging, and reliability engineering. She possesses end-to-end expertise spanning device physics, materials R&D, process integration, and mass production. As a leading authority, she has driven key technological breakthroughs and industrialization, with extensive publications and core patents, and is highly recognized worldwide.