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Lattice Semiconductor
ISPLSI 5384VE-100LBN272
695-ISPLSI 5384VE-100LBN272
PDF Datasheet
CPLD ispLSI® 5000VE Family 18K Gates 384 Macro Cells 100MHz 3.3V 272-Pin BGA
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Tech Specifications
Program Memory Type
ROMLess
PCB changed
272
HTS
COMPONENTS
Number of Flip Flops
384
ECCN (US)
EAR99
PPAP
No
Maximum Number of User I/Os
192
Number of Global Clocks
4
ISPLSI 5384VE-100LBN272 Description
CPLD ispLSI® 5000VE Family 18K Gates 384 Macro Cells 100MHz 3.3V 272-Pin BGA
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