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74ALVCH16652DGGS
704-74ALVCH16652DGGS
PDF Datasheet
74ALVCH16652 - 16-bit transceiver/register with dual enable; 3-state TSSOP 56-Pin
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Tech Specifications
Max Operating Temperature
85
Number of Terminals
56
Min Operating Temperature
-40
Terminal Position
DUAL
JEDEC Package Code
R-PDSO-G56
Width
6.1
Length
14
Pin Count
56
74ALVCH16652DGGS Description
Transceiver, Non-Inverting 2 Element 8 Bit per Element 3-State Output 56-TSSOP
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