Flip-flops are elementary digital memory devices capable of storing a single logic state or "bit" of information. They have at least two inputs; one or more to communicate the data to be stored and another to indicate the point in time to store it. Different flip-flop types such as D (delay), SR (Set-Reset), and JK respond differently to the signals presented to their inputs and can be used to implement different logical functions. They differ from latches in that they are edge sensitive devices, whose retained logic state changes only at the moment a valid clock signal is received.
| Part # | Manufacturer | Description | Availability | Pricing | Quantity |
|---|---|---|---|---|---|
74ALVCH16374DGG:11Flip Flops | Nexperia | IC FF D-TYPE DUAL 8BIT 48TSSOP | In Stock | - | |
74LVC16374ADGG,112Flip Flops | Nexperia | 74LVC(H)16374A - 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state TSSOP 48-Pin | 8223 | - | |
74LVCH16374ADGG,11Flip Flops | Nexperia | 74LVC(H)16374A - 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state TSSOP 48-Pin | In Stock | - | |
74LVT162374DGG,118Flip Flops | Nexperia | IC FF D-TYPE DUAL 8BIT 48TSSOP | 2832 | - | |
74LVT16374ADGG,112Flip Flops | Nexperia | 74LVT16374A; 74LVTH16374A - 3.3 V 16-bit edge-triggered D-type flip-flop; 3-state TSSOP 48-Pin | 11895 | - | |
74LVT16374ADGG,118Flip Flops | Nexperia | 74LVT16374A; 74LVTH16374A - 3.3 V 16-bit edge-triggered D-type flip-flop; 3-state TSSOP 48-Pin | 629 | - | |
74AHC74D-Q100JFlip Flops | Nexperia | 74AHC74-Q100; 74AHCT74-Q100 - Dual D-type flip-flop with set and reset; positive-edge trigger SOIC 14-Pin | 5 | - | |
74AHC74PW-Q100JFlip Flops | Nexperia | 74AHC74-Q100; 74AHCT74-Q100 - Dual D-type flip-flop with set and reset; positive-edge trigger TSSOP 14-Pin | 537 | - | |
74AHCT74PW-Q100JFlip Flops | Nexperia | 74AHC74-Q100; 74AHCT74-Q100 - Dual D-type flip-flop with set and reset; positive-edge trigger TSSOP 14-Pin | In Stock | - | |
74LVC74AD-Q100JFlip Flops | Nexperia | 74LVC74A - Dual D-type flip-flop with set and reset; positive-edgen trigger SOIC 14-Pin | In Stock | - | |
74LVC1G74DC-Q100HFlip Flops | Nexperia | 74LVC1G74-Q100 - Single D-type flip-flop with set and reset; positive-edge trigger SSOP 8-Pin | In Stock | - | |
74LVC1G74DP-Q100HFlip Flops | Nexperia | 74LVC1G74-Q100 - Single D-type flip-flop with set and reset; positive-edge trigger TSSOP 8-Pin | 22604 | 1+: $0.53230 10+: $0.42380 30+: $0.37780
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74LVC2G74DC-Q100HFlip Flops | Nexperia | 74LVC2G74-Q100 - Single D-type flip-flop with set and reset; positive-edge trigger SSOP 8-Pin | 1230 | 1+: $0.35210 10+: $0.26890 30+: $0.23330
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74LVC2G74DP-Q100HFlip Flops | Nexperia | 74LVC2G74-Q100 - Single D-type flip-flop with set and reset; positive-edge trigger TSSOP 8-Pin | 88 | 1+: $0.78030 10+: $0.62590 30+: $0.54870
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74LVC374ABQ-Q100XFlip Flops | Nexperia | 74LVC374A-Q100 - Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edgen trigger; 3-state QFN 20-Pin | In Stock | - | |
74AHCT374D-Q100JFlip Flops | Nexperia | 74AHC(T)374-Q100 - Octal D-type flip-flop; positive-edge trigger; 3-state SOP 20-Pin | In Stock | - | |
74ALVT16821DGGYFlip Flops | Nexperia | 74ALVT16821 - 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state TSSOP 56-Pin | In Stock | - | |
74ALVT16823DGGYFlip Flops | Nexperia | 74ALVT16823 - 18-bit bus-interface D-type flip-flop with reset and enable; 3-state TSSOP 56-Pin | In Stock | - | |
74AUP1G74DC-Q100HFlip Flops | Nexperia | 74AUP1G74-Q100 - Low-power D-type flip-flop with set and reset; positive-edge trigger SSOP 8-Pin | 2710 | 1+: $0.54210 10+: $0.42380 30+: $0.37290
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74LVC1G79GV-Q100HFlip Flops | Nexperia | 74LVC1G79-Q100 - Single D-type flip-flop; positive-edge trigger TSOP 5-Pin | In Stock | - | |
74LVC1G79GW-Q100HFlip Flops | Nexperia | 74LVC1G79-Q100 - Single D-type flip-flop; positive-edge trigger TSSOP 5-Pin | 15 | - | |
74HC109D-Q100JFlip Flops | Nexperia | 74HC109-Q100; 74HCT109-Q100 - Dual J flip-flop with set and reset; positive-edge-trigger SOP 16-Pin | 2460 | - | |
74HCT109D-Q100JFlip Flops | Nexperia | 74HC109-Q100; 74HCT109-Q100 - Dual J flip-flop with set and reset; positive-edge-trigger SOP 16-Pin | 2679 | - | |
74LVC823ABQ-Q100JFlip Flops | Nexperia | 74LVC823A-Q100 - 9-bit D-type flip-flop with 5 V tolerant inputs/outputs;ntttpositive edge-trigger; 3-state QFN 24-Pin | In Stock | - | |
74AUP1G74GXXFlip Flops | Nexperia | 74AUP1G74 - Low-power D-type flip-flop with set and reset; positive-edge trigger | 7277 | - |